Showing posts with label ESRC and Dept of Electronics. Show all posts
Showing posts with label ESRC and Dept of Electronics. Show all posts

Monday, 16 November 2015

A Nobel Design of An Efficient Decimator using Matlab Simulink


Author(s):

Aditi , DIT University, Dehradun; Abhinav Chauhan, DIT University, Dehradun; D. N. Rao, DIT University, Dehradun; Sandeep Sharma, DIT University, Dehradun

Keywords:

Digital Signal Processing, Filters, Multirate, Decimation, Interpolation And Matlab Simulink

Abstract

The need to process data at more than one sampling rate is increasing in modern digital systems. Through this paper we are presenting the various techniques of altering the sampling rate in a multi rate system and we have also discussed the filter requirements for efficient output of the decimator for the professional recording production equipment application having a sampling rate of 96 kHz. We have also compared the total storage requirements (TSR) and multiplications per second (MPS) requirements at each stage of decimator using Matlab Simulink.

Preview

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Wednesday, 23 September 2015

NCIL – 2015 #IJSRD Publication Partner

NCIL - 2015
National Conference on "Student-driven Research for Inspired Learning" in Science and Technology
Organised by ESRC and Dept of Electronics
Publication Partner International Journal for scientific research & Development (IJSRD)
Date: 16-17 October 2015